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axis_switch
Xilinx SDK Drivers API Documentation
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Macros | |
| #define | XAXIS_SWITCH_HW_H_ |
| Prevent circular inclusions by using protection macros. More... | |
MI MUX register offsets | |
| #define | XAXIS_SCR_CTRL_OFFSET 0x000 |
| Control Register offset. More... | |
| #define | XAXIS_SCR_MI_MUX_START_OFFSET 0x040 |
| Start of MI MUX Register offset. More... | |
| #define | XAXIS_SCR_MI_MUX_END_OFFSET 0x07C |
| End of MI MUX Register offset. More... | |
MI MUX Control register mask | |
| #define | XAXIS_SCR_CTRL_REG_UPDATE_MASK 0x02 |
| Register Update mask. More... | |
MI MUX register mask | |
It is applicable for MI[0...15] registers. | |
| #define | XAXIS_SCR_MI_X_MUX_MASK 0x0F |
| MI MUX mask. More... | |
| #define | XAXIS_SCR_MI_X_DISABLE_MASK 0x80000000 |
| MI Disable mask. More... | |
| #define | XAXIS_SCR_MI_X_DISABLE_SHIFT 31 |
| MI Disable shift. More... | |
Register access macro definition | |
| #define | XAxisScr_In32 Xil_In32 |
| Input Operations. More... | |
| #define | XAxisScr_Out32 Xil_Out32 |
| Output Operations. More... | |
| #define | XAxisScr_ReadReg(BaseAddress, RegOffset) XAxisScr_In32((BaseAddress) + ((u32)RegOffset)) |
| This macro reads a value from a AXI4-Stream Switch register. More... | |
| #define | XAxisScr_WriteReg(BaseAddress, RegOffset, Data) XAxisScr_Out32((BaseAddress) + ((u32)RegOffset), (u32)(Data)) |
| This macro writes a value to a AXI4-Stream Switch register. More... | |