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vphy
Xilinx SDK Drivers API Documentation
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This typedef contains configuration information for PLL type and its reference clock. More...
Data Fields | |
| u64 | LineRateHz |
| The line rate for the channel. More... | |
| u8 | RxDataWidth |
| In bits. More... | |
| u8 | RxIntDataWidth |
| In bytes. More... | |
| u8 | TxDataWidth |
| In bits. More... | |
| u8 | TxIntDataWidth |
| In bytes. More... | |
| XVphy_PllParam | CpllParams |
| Parameters for a CPLL. More... | |
| XVphy_PllRefClkSelType | CpllRefClkSel |
| Multiplexer selection for the reference clock of the CPLL. More... | |
| u8 | RxOutDiv |
| Output clock divider D for the RX datapath. More... | |
| u8 | TxOutDiv |
| Output clock divider D for the TX datapath. More... | |
| XVphy_GtState | RxState |
| Current state of RX GT. More... | |
| XVphy_GtState | TxState |
| Current state of TX GT. More... | |
| XVphy_ProtocolType | RxProtocol |
| The protocol which the RX path is used for. More... | |
| XVphy_ProtocolType | TxProtocol |
| The protocol which the TX path is used for. More... | |
| XVphy_SysClkDataSelType | RxDataRefClkSel |
| Multiplexer selection for the reference clock of the RX datapath. More... | |
| XVphy_SysClkDataSelType | TxDataRefClkSel |
| Multiplexer selection for the reference clock of the TX datapath. More... | |
| XVphy_SysClkOutSelType | RxOutRefClkSel |
| Multiplexer selection for the reference clock of the RX output clock. More... | |
| XVphy_SysClkOutSelType | TxOutRefClkSel |
| Multiplexer selection for the reference clock of the TX output clock. More... | |
| XVphy_OutClkSelType | RxOutClkSel |
| Multiplexer selection for which clock to use as the RX output clock. More... | |
| XVphy_OutClkSelType | TxOutClkSel |
| Multiplexer selection for which clock to use as the TX output clock. More... | |
| u8 | RxDelayBypass |
| Bypasses the delay alignment block for the RX output clock. More... | |
| u8 | TxDelayBypass |
| Bypasses the delay alignment block for the TX output clock. More... | |
This typedef contains configuration information for PLL type and its reference clock.
| XVphy_PllParam XVphy_Channel::CpllParams |
Parameters for a CPLL.
| XVphy_PllRefClkSelType XVphy_Channel::CpllRefClkSel |
Multiplexer selection for the reference clock of the CPLL.
| u64 XVphy_Channel::LineRateHz |
The line rate for the channel.
| XVphy_SysClkDataSelType XVphy_Channel::RxDataRefClkSel |
Multiplexer selection for the reference clock of the RX datapath.
| u8 XVphy_Channel::RxDataWidth |
In bits.
| u8 XVphy_Channel::RxDelayBypass |
Bypasses the delay alignment block for the RX output clock.
| u8 XVphy_Channel::RxIntDataWidth |
In bytes.
| XVphy_OutClkSelType XVphy_Channel::RxOutClkSel |
Multiplexer selection for which clock to use as the RX output clock.
| u8 XVphy_Channel::RxOutDiv |
Output clock divider D for the RX datapath.
| XVphy_SysClkOutSelType XVphy_Channel::RxOutRefClkSel |
Multiplexer selection for the reference clock of the RX output clock.
| XVphy_ProtocolType XVphy_Channel::RxProtocol |
The protocol which the RX path is used for.
| XVphy_GtState XVphy_Channel::RxState |
Current state of RX GT.
| XVphy_SysClkDataSelType XVphy_Channel::TxDataRefClkSel |
Multiplexer selection for the reference clock of the TX datapath.
| u8 XVphy_Channel::TxDataWidth |
In bits.
| u8 XVphy_Channel::TxDelayBypass |
Bypasses the delay alignment block for the TX output clock.
| u8 XVphy_Channel::TxIntDataWidth |
In bytes.
| XVphy_OutClkSelType XVphy_Channel::TxOutClkSel |
Multiplexer selection for which clock to use as the TX output clock.
| u8 XVphy_Channel::TxOutDiv |
Output clock divider D for the TX datapath.
| XVphy_SysClkOutSelType XVphy_Channel::TxOutRefClkSel |
Multiplexer selection for the reference clock of the TX output clock.
| XVphy_ProtocolType XVphy_Channel::TxProtocol |
The protocol which the TX path is used for.
| XVphy_GtState XVphy_Channel::TxState |
Current state of TX GT.